news

Jul 10, 2025 One paper “ShuffleV: A Microarchitectural Defense Strategy against Electromagnetic Side-Channel Attacks in Microprocessors” was accepted to RAID 2025.
Feb 26, 2025 One paper (with Shijin Duan) “Holistic Design towards Resource-Stringent Binary Vector Symbolic Architecture” was accepted to DAC 2025.
Jan 5, 2025 I will serve on the artifact evaluation committee for ASPLOS 2025 (Fall cycle).
Nov 20, 2024 I will serve on the artifact evaluation committee for OOPSLA 2025.
Jun 17, 2024 One paper “ALLI/O Diagram: An Action-based Visual Programming Language for Embedded System” was accepted to VL/HCC 2024.
Apr 12, 2024 I will serve on the artifact evaluation committee for ECOOP 2024.
Jan 15, 2024 I will serve on the artifact evaluation committee for PLDI 2024.
Nov 7, 2023 One paper “MicroVSA: An Ultra-Lightweight Vector Symbolic Architecture-based Classifier Library for Tiny Microcontrollers” was accepted to ASPLOS 2024.